| A novel methodology for the design of application-specific instruction-set processors (ASIPs) using a machine description language A Hoffmann, T Kogel, A Nohl, G Braun, O Schliebusch, O Wahlen, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001 | 227 | 2001 |
| A modular simulation framework for spatial and temporal task mapping onto multi-processor SoC platforms T Kempf, M Doerper, R Leupers, G Ascheid, H Meyr, T Kogel, ... Design, Automation and Test in Europe, 876-881, 2005 | 127 | 2005 |
| System level processor/communication co-exploration methodology for multiprocessor system-on-chip platforms A Wieferink, M Doerper, R Leupers, G Ascheid, H Meyr, T Kogel, G Braun, ... IEE Proceedings-Computers and Digital Techniques 152 (1), 3-11, 2005 | 111 | 2005 |
| A framework for fast hardware-software co-simulation A Hoffmann, T Kogel, H Meyr Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001 | 96 | 2001 |
| A modular simulation framework for architectural exploration of on-chip interconnection networks T Kogel, M Doerper, A Wieferink, R Leupers, G Ascheid, H Meyr, ... Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003 | 90 | 2003 |
| A methodology and tool suite for C compiler generation from ADL processor models M Hohenauer, H Scharwaechter, K Karuri, O Wahlen, T Kogel, R Leupers, ... Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 70 | 2004 |
| An overview of efficient interconnection networks for deep neural network accelerators SM Nabavinejad, M Baharloo, KC Chen, M Palesi, T Kogel, M Ebrahimi IEEE Journal on Emerging and Selected Topics in Circuits and Systems 10 (3 …, 2020 | 61 | 2020 |
| Virtual platforms: Breaking new grounds R Leupers, G Martin, R Plyaskin, A Herkersdorf, F Schirrmeister, T Kogel, ... 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 685-690, 2012 | 56 | 2012 |
| Integrated system-level modeling of network-on-chip enabled multi-processor platforms T Kogel, R Leupers, H Meyr Springer, 2006 | 43 | 2006 |
| Virtual architecture mapping: A SystemC based methodology for architectural exploration of system-on-chip designs T Kogel, M Doerper, T Kempf, A Wieferink, R Leupers, G Ascheid, H Meyr Computer Systems: Architectures, Modeling, and Simulation: Third and Fourth …, 2004 | 42 | 2004 |
| Heterogeneous MP-SoC: the solution to energy-efficient signal processing T Kogel, H Meyr Proceedings of the 41st annual Design Automation Conference, 686-691, 2004 | 30 | 2004 |
| A framework for automated and optimized ASIP implementation supporting multiple hardware description languages O Schliebusch, A Chattopadhyay, D Kammler, G Ascheid, R Leupers, ... Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005 | 28 | 2005 |
| Developing transaction-level models in systemc B Vanthournout, S Goossens, T Kogel CoWare Inc, 27, 2004 | 23 | 2004 |
| A highly efficient modeling style for heterogeneous bus architectures M Ariyamparambath, D Bussaglia, B Reinkemeier, T Kogel, T Kempf Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No …, 2003 | 17 | 2003 |
| Early iss integration into network-on-chip designs A Wieferink, M Doerper, T Kogel, R Leupers, G Ascheid, H Meyr Computer Systems: Architectures, Modeling, and Simulation: Third and Fourth …, 2004 | 16 | 2004 |
| A generic tool-set for SoC multiprocessor debugging and synchronization A Wieferink, T Kogel, R Leupers, H Meyr, A Nohl, A Hoffman Proceedings IEEE International Conference on Application-Specific Systems …, 2003 | 16 | 2003 |
| An executable intermediate representation for retargetable compilation and high-level code optimization R Leupers, O Wahlen, M Hohenauer, T Kogel, P Marwedel SAMOS 2003, 120, 2003 | 15 | 2003 |
| Virtual prototyping of embedded platforms for wireless and multimedia T Kogel, M Braun Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006 | 13 | 2006 |
| OCP TLM for Architectural Modelling. T Kogel, A Haverinen, J Aldis FDL, 225-244, 2005 | 12 | 2005 |
| Retargetable generation of TLM bus interfaces for MP-SoC platforms A Wieferink, R Leupers, G Ascheid, H Meyr, T Michiels, A Nohl, T Kogel Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware …, 2005 | 11 | 2005 |
