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Haikun Zhu
Haikun Zhu
Verified email at cs.ucsd.edu
Title
Cited by
Cited by
Year
An algorithmic approach for generic parallel adders
J Liu, S Zhou, H Zhu, CK Cheng
ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003
702003
Optimum prefix adders in a comprehensive area, timing and power design space
J Liu, Y Zhu, H Zhu, CK Cheng, J Lillis
2007 Asia and South Pacific Design Automation Conference, 609-615, 2007
412007
On the construction of zero-deficiency parallel prefix circuits with minimum depth
H Zhu, CK Cheng, R Graham
ACM Transactions on Design Automation of Electronic Systems (TODAES) 11 (2 …, 2006
392006
Constructing zero-deficiency parallel prefix adder of minimum depth
H Zhu, CK Cheng, R Graham
Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005
392005
Approaching speed-of-light distortionless communication for on-chip interconnect
H Zhu, R Shi, CK Cheng, H Chen
2007 Asia and South Pacific Design Automation Conference, 684-689, 2007
222007
Analytical eye-diagram model for on-chip distortionless transmission lines and its application to design space exploration
M Hashimoto, J Siriporn, A Tsuchiya, H Zhu, CK Cheng
IEICE Transactions on Fundamentals of Electronics, Communications and …, 2008
172008
Predicting and optimizing jitter and eye-opening based on bitonic step response
H Zhu, CK Cheng, A Deutsch, G Katopis
2007 IEEE Electrical Performance of Electronic Packaging, 155-158, 2007
142007
Low power passive equalizer optimization using tritonic step response
L Zhang, W Yu, H Zhu, A Deutsch, GA Katopis, DM Dreps, E Kuh, ...
Proceedings of the 45th annual Design Automation Conference, 570-573, 2008
112008
Clock divider system and method with incremental adjustment steps while controlling tolerance in clock duty cycle
S Das, H Zhu, KR Bowles, ML Severson
US Patent 8,433,944, 2013
92013
Timing-power optimization for mixed-radix Ling adders by integer linear programming
Y Zhu, J Liu, H Zhu, CK Cheng
2008 Asia and South Pacific Design Automation Conference, 131-137, 2008
82008
An interconnect-centric approach to cyclic shifter design using fanout splitting and cell order optimization
H Zhu, Y Zhu, CK Cheng, DM Harris
2007 Asia and South Pacific Design Automation Conference, 616-621, 2007
82007
Distortion minimization for packaging level interconnects
H Zhu, R Shi, H Chen, C Cheng, A Deutsch, G Katopis
2006 IEEE Electrical Performane of Electronic Packaging, 175-178, 2006
72006
Clock skew analysis via vector fitting in frequency domain
L Zhang, W Yu, H Zhu, W Zhang, CK Cheng
9th International Symposium on Quality Electronic Design (isqed 2008), 476-479, 2008
52008
Passive compensation for high performance inter-chip communication
CC Liu, H Zhu, CK Cheng
2007 25th International Conference on Computer Design, 547-552, 2007
52007
Operand conflict resolution for reduced port general purpose register
Y Du, H Shang, H Zhu
US Patent 9,632,783, 2017
42017
High performance current-mode differential logic
L Zhang, J Liu, H Zhu, CK Cheng, M Hashimoto
2008 Asia and South Pacific Design Automation Conference, 720-725, 2008
42008
High-performance low-power VLSI design
H Zhu
University of California, San Diego, 2007
22007
On the integer partitioning problem: Examples intuition and beyond
H Zhu
UCSD Technical Report, 2002
12002
On-Chip Inductance Modeling, Analysis and Simulation
H Zhu
Class presentation, CSE 245, 2000
12000
An Interconnect-Centric Approach to Cyclic Shifter Design
DM Harris, H Zhu, Y Zhu, CK Cheng
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Articles 1–20