Ting Cao
Ting Cao
Postdoc of State Key Lab of Computer Architecture, Institute of Computing Technology, Chinese
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Citado por
Citado por
The yin and yang of power and performance for asymmetric hardware and managed software
T Cao, SM Blackburn, T Gao, KS McKinley
2012 39th Annual International Symposium on Computer Architecture (ISCA …, 2012
Looking back on the language and hardware revolutions: measured power, performance, and scaling
H Esmaeilzadeh, T Cao, Y Xi, SM Blackburn, KS McKinley
ACM SIGARCH Computer Architecture News 39 (1), 319-332, 2011
Parallel processing systems for big data: a survey
Y Zhang, T Cao, S Li, X Tian, L Yuan, H Jia, AV Vasilakos
Proceedings of the IEEE 104 (11), 2114-2136, 2016
WADE: Writeback-aware dynamic cache management for NVM-based main memory system
Z Wang, S Shan, T Cao, J Gu, Y Xu, S Mu, Y Xie, DA Jiménez
ACM Transactions on Architecture and Code Optimization (TACO) 10 (4), 1-21, 2013
Looking back and looking forward: power, performance, and upheaval
H Esmaeilzadeh, T Cao, X Yang, SM Blackburn, KS McKinley
Communications of the ACM 55 (7), 105-114, 2012
Elfen scheduling: Fine-grain principled borrowing from latency-critical workloads using simultaneous multithreading
X Yang, SM Blackburn, KS McKinley
2016 {USENIX} Annual Technical Conference ({USENIX}{ATC} 16), 309-322, 2016
The magazine archive includes every article published in Communications of the ACM for over the past 50 years.
PJ Denning
Communications of the ACM 60 (12), 20-23, 2017
What is happening to power, performance, and software?
H Esmaeilzadeh, T Cao, X Yang, S Blackburn, K McKinley
IEEE Micro 32 (3), 110-121, 2012
TL-plane-based multi-core energy-efficient real-time scheduling algorithm for sporadic tasks
D Zhang, D Guo, F Chen, F Wu, T Wu, T Cao, S Jin
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-20, 2012
Panthera: holistic memory management for big data processing over hybrid memories
C Wang, H Cui, T Cao, J Zigman, H Volos, O Mutlu, F Lv, X Feng, GH Xu
Proceedings of the 40th ACM SIGPLAN Conference on Programming Language …, 2019
Portable performance on asymmetric multicore processors
I Jibaja, T Cao, SM Blackburn, KS McKinley
Proceedings of the 2016 International Symposium on Code Generation and …, 2016
Efficient management for hybrid memory in managed language runtime
C Wang, T Cao, J Zigman, F Lv, Y Zhang, X Feng
IFIP International Conference on Network and Parallel Computing, 29-42, 2016
Methods and apparatus related to data processors and caches incorporated in data processors
Z Wang, X Yuan, J Gu, Y Xu, S Shan, S Mu, T Cao
US Patent 9,317,448, 2016
DSS: Applying asynchronous techniques to architectures exploiting ILP at compile time
W Shi, Z Wang, H Ren, T Cao, W Chen, B Su, H Lu
2010 IEEE International Conference on Computer Design, 321-327, 2010
Optimizing Image Sharpening Algorithm on GPU
M Fan, H Jia, Y Zhang, X An, T Cao
2015 44th International Conference on Parallel Processing, 230-239, 2015
iCHAT: inter-cache hardware-assistant data transfer for heterogeneous chip multiprocessors
J Gu, BM Beckmann, T Cao, Y Hu
2014 9th IEEE International Conference on Networking, Architecture, and …, 2014
Profiling and optimizing deep learning inference on mobile GPUs
S Jiang, L Ran, T Cao, Y Xu, Y Liu
Proceedings of the 11th ACM SIGOPS Asia-Pacific Workshop on Systems, 75-81, 2020
Enhancing lifetime of non-volatile cache by reducing intra-block write variation
Z Wang, Y Xie, Y Xu, J Gu, T Cao
US Patent 9,767,043, 2017
Power, Performance, and Upheaval: An Opportunity for Managed Languages
T Cao
Australian National University, 2014
3 Guest Editors’ Introduction: Top Picks from the 2011 Computer Architecture Conferences Paolo Faraboschi and TN Vijaykumar 7 Kilo TM: Hardware Transactional Memory for GPU …
WWL Fung, I Singh, A Brownsword, TM Aamodt, B Grot, J Hestness, ...
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