Jeff (Jun) ZHANG
Jeff (Jun) ZHANG
Harvard University, New York University
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Thundervolt: enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators
J Zhang, K Rangineni, Z Ghodsi, S Garg
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
Analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator
JJ Zhang, T Gu, K Basu, S Garg
2018 IEEE 36th VLSI Test Symposium (VTS), 1-6, 2018
Power efficiency for hardware/software partitioning with time and area constraints on mpsoc
E Sha, L Wang, Q Zhuge, J Zhang, J Liu
International Journal of Parallel Programming 43 (3), 381-402, 2015
Logic locking for secure outsourced chip fabrication: A new attack and provably secure defense mechanism
ME Massad, J Zhang, S Garg, MV Tripunitara
arXiv preprint arXiv:1703.10187, 2017
Energy optimization for data allocation with hybrid sram+ nvm spm
Y Wang, K Li, J Zhang, K Li
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (1), 307-318, 2017
Efficient fault-tolerant scheduling on multiprocessor systems via replication and deallocation
J Zhang, EHM Sha, Q Zhuge, J Yi, K Wu
International Journal of Embedded Systems 6 (2), 216-224, 2014
Building robust machine learning systems: Current progress, research challenges, and opportunities
JJ Zhang, K Liu, F Khalid, MA Hanif, S Rehman, T Theocharides, A Artussi, ...
Proceedings of the 56th Annual Design Automation Conference 2019, 1-4, 2019
FATE: fast and accurate timing error prediction framework for low power DNN accelerator design
JJ Zhang, S Garg
2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018
An adaptive invasive weed optimization algorithm
S Peng, AJ Ouyang, JJ Zhang
International Journal of Pattern Recognition and Artificial Intelligence 29 …, 2015
Optimizing data allocation for loops on embedded systems with scratch-pad memory
J Zhang, T Deng, Q Gao, Q Zhuge, EHM Sha
2012 IEEE International Conference on Embedded and Real-Time Computing …, 2012
Fault-tolerant systolic array based accelerators for deep neural network execution
JJ Zhang, K Basu, S Garg
IEEE Design & Test 36 (5), 44-53, 2019
CompAct: On-chip Compression of Activations for Low Power Systolic Array Based CNN Acceleration
J Zhang, P Raj, S Zarar, A Ambardekar, S Garg
ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 1-24, 2019
BandiTS: dynamic timing speculation using multi-armed bandit based optimization
JJ Zhang, S Garg
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
Synergistic timing speculation for multi-threaded programs
A Yasin, JJ Zhang, H Chen, S Garg, S Roy, K Chakraborty
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
Efficient feasibility analysis of DAG scheduling with real-time constraints in the presence of faults
X Cui, J Zhang, K Wu, E Sha
Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific …, 2014
Optimizing data placement of loops for energy minimization with multiple types of memories
J Zhang, T Deng, Q Gao, Q Zhuge, EHM Sha
Journal of Signal Processing Systems 72 (3), 151-164, 2013
Enabling extreme energy efficiency via timing speculation for deep neural network accelerators
J Zhang, Z Ghodsi, K Rangineni, S Garg
NYU Center for Cyber Security, 2017
Enabling Timing Error Resilience for Low-Power Systolic-Array Based Deep Learning Accelerators
J Zhang, Z Ghodsi, S Garg, K Rangineni
IEEE Design & Test 37 (2), 93-102, 2019
Selectively controlling memory power for scheduled computations
AA Ambardekar, SM Zarar, J Zhang
US Patent App. 16/355,086, 2020
Model-switching: Dealing with fluctuating workloads in machine-learning-as-a-service systems
J Zhang, S Elnikety, S Zarar, A Gupta, S Garg
12th {USENIX} Workshop on Hot Topics in Cloud Computing (HotCloud 20), 2020
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