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Kaijie Wu
Kaijie Wu
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Dirección de correo verificada de nyu.edu
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Año
Scan based side channel attack on dedicated hardware implementations of data encryption standard
B Yang, K Wu, R Karri
2004 International Conferce on Test, 339-344, 2004
4402004
Secure scan: A design-for-test architecture for crypto chips
B Yang, K Wu, R Karri
Proceedings of the 42nd annual Design Automation Conference, 135-140, 2005
3872005
The robust QCA adder designs using composable QCA building blocks
K Kim, K Wu, R Karri
IEEE transactions on computer-aided design of integrated circuits and …, 2006
2822006
Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers
R Karri, K Wu, P Mishra, Y Kim
IEEE Transactions on computer-aided design of integrated circuits and …, 2002
2412002
Low cost concurrent error detection for the advanced encryption standard
K Wu, R Karri, G Kuznetsov, M Goessel
2004 International Conferce on Test, 1242-1248, 2004
1702004
Quantum-dot cellular automata design guideline
K Kim, K Wu, R Karri
IEICE Transactions on Fundamentals of Electronics, Communications and …, 2006
1442006
Towards designing robust QCA architectures in the presence of sneak noise paths
K Kim, K Wu, R Karri
Design, Automation and Test in Europe, 1214-1219, 2005
1382005
Fault-based side-channel cryptanalysis tolerant Rijndael symmetric block cipher architecture
R Karri, K Wu, P Mishra, Y Kim
Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance …, 2001
1282001
Securing hardware accelerators: A new challenge for high-level synthesis
C Pilato, S Garg, K Wu, R Karri, F Regazzoni
IEEE Embedded Systems Letters 10 (3), 77-80, 2017
892017
Exploiting parallelism in I/O scheduling for access conflict minimization in flash-based solid state drives
C Gao, L Shi, M Zhao, CJ Xue, K Wu, EHM Sha
2014 30th Symposium on Mass Storage Systems and Technologies (MSST), 1-11, 2014
822014
Access characteristic guided read and write cost regulation for performance improvement on flash memory
Q Li, L Shi, CJ Xue, K Wu, C Ji, Q Zhuge, EHM Sha
14th USENIX Conference on File and Storage Technologies (FAST 16), 125-132, 2016
732016
High-level synthesis for run-time hardware Trojan detection and recovery
X Cui, K Ma, L Shi, K Wu
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
702014
Scan-based attacks on linear feedback shift register based stream ciphers
Y Liu, K Wu, R Karri
ACM Transactions on Design Automation of Electronic Systems (TODAES) 16 (2 …, 2011
662011
Concurrent error detection of fault-based side-channel cryptanalysis of 128-bit symmetric block ciphers
R Karri, K Wu, P Mishra, Y Kim
Proceedings of the 38th annual Design Automation Conference, 579-584, 2001
622001
Fault secure datapath synthesis using hybrid time and hardware redundancy
K Wu, R Karri
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004
552004
TaintHLS: High-level synthesis for dynamic information flow tracking
C Pilato, K Wu, S Garg, R Karri, F Regazzoni
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
482018
Exploiting process variation for write performance improvement on NAND flash memory storage systems
L Shi, Y Di, M Zhao, CJ Xue, K Wu, EHM Sha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (1), 334-337, 2015
472015
Fault tolerant quantum cellular array (QCA) design using triple modular redundancy with shifted operands
T Wei, K Wu, R Karri, A Orailoglu
Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005
472005
Retention trimming for lifetime improvement of flash memory storage systems
L Shi, K Wu, M Zhao, CJ Xue, D Liu, EHM Sha
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
462015
Exploiting parallelism for access conflict minimization in flash-based solid state drives
C Gao, L Shi, C Ji, Y Di, K Wu, CJ Xue, EHM Sha
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
412017
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