Dual-stage power management algorithms for energy harvesting sensors S Reddy, CR Murthy IEEE Transactions on Wireless Communications 11 (4), 1434-1445, 2012 | 64 | 2012 |
Profile-based load scheduling in wireless energy harvesting sensors for data rate maximization S Reddy, CR Murthy 2010 IEEE international conference on communications, 1-5, 2010 | 34 | 2010 |
Gain and memory error estimation in a pipeline analog to digital converter SKR Naru, N Rajagopal, S Dusad, V Nagarajan, VA Pentakota US Patent 10,541,700, 2020 | 13 | 2020 |
Histogram based error estimation and correction V Nagarajan, SKR Naru, RKV Parupudi US Patent 9,748,966, 2017 | 12 | 2017 |
Duty cycling and power management with a network of energy harvesting sensors S Reddy, CR Murthy 2011 4th IEEE International Workshop on Computational Advances in Multi …, 2011 | 10 | 2011 |
Error correcting analog-to-digital converters V Nagarajan, SKR Naru, N Rajagopal US Patent 10,103,753, 2018 | 5 | 2018 |
Lookup table for non-linear systems VA Pentakota, SKR Naru, C Shetty, E Miglani, N Shrivastava, ... US Patent App. 17/588,493, 2022 | 3 | 2022 |
Gain correction for multi-bit successive-approximation register SKR Naru, AJ George, S Dusad, VA Pentakota US Patent 11,239,851, 2022 | 1 | 2022 |
Sample based gain error estimation for analog to digital converter SKR Naru, N Viswanathan, V Pentakota US Patent 10,530,378, 2020 | 1 | 2020 |
Delay modulated clock division J Balakrishnan, S Dusad, V Pentakota, SKR Naru, SS Gunturi, ... US Patent 10,341,082, 2019 | 1 | 2019 |
Pattern based estimation of errors in ADC SKR Naru, VP Appala, S Dusad, N Shrivastava, V Nagarajan, A Xavier, ... US Patent 9,941,893, 2018 | 1 | 2018 |
Gain and offset correction in an interpolation ADC SKR Naru, N Viswanathan, V Pentakota US Patent 9,479,186, 2016 | 1 | 2016 |
Calibration scheme for filling lookup table in an ADC N Rajagopal, E Miglani, CC Shetty, N Shrivastava, S Dusad, SKR Naru, ... US Patent 11,881,867, 2024 | | 2024 |
Methods and apparatus to calibrate a dual-residue pipeline analog to digital converter K Prasanth, SKR Naru, VA Pentakota US Patent 11,689,210, 2023 | | 2023 |
Numerically-controlled oscillator with dithered coarse and fine splitter V Arora, SKR Naru US Patent 11,496,124, 2022 | | 2022 |
Gain and memory error estimation in a pipeline analog to digital converter SKR Naru, N Rajagopal, S Dusad, V Nagarajan, VA Pentakota US Patent 11,309,902, 2022 | | 2022 |
Gain correction for multi-bit successive-approximation register SKR Naru, AJ George, S Dusad, VA Pentakota US Patent 10,790,841, 2020 | | 2020 |
Error correcting analog-to-digital converters V Nagarajan, SKR Naru, N Rajagopal US Patent 10,419,036, 2019 | | 2019 |
Delay modulated clock division J Balakrishnan, S Dusad, V Pentakota, SKR Naru, SS Gunturi, ... US Patent App. 16/417,827, 2019 | | 2019 |
Pattern based estimation of errors in ADC SKR Naru, VP Appala, S Dusad, N Shrivastava, V Nagarajan, A Xavier, ... US Patent 10,320,405, 2019 | | 2019 |