Masoud Dehyadegari
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Evaluation of pseudo adaptive XY routing using an object oriented model for NOC
M Dehyadgari, M Nickray, A Afzali-Kusha, Z Navabi
2005 International Conference on Microelectronics, 5 pp., 2005
1092005
Emotion on FPGA: Model driven approach
MR Jamali, A Arami, M Dehyadegari, C Lucas, Z Navabi
Expert Systems with Applications 36 (4), 7369-7378, 2009
462009
Real-time embedded emotional controller
MR Jamali, M Dehyadegari, A Arami, C Lucas, Z Navabi
Neural Computing and Applications 19 (1), 13-19, 2010
452010
An adaptive fuzzy logic-based routing algorithm for networks-on-chip
M Dehyadegari, M Daneshtalab, M Ebrahimi, J Plosila, S Mohammadi
2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 208-214, 2011
322011
Power and delay optimization for network on chip
M Nickray, M Dehyadgari, A Afzali-Kusha
Proceedings of the 2005 European Conference on Circuit Theory and Design …, 2005
282005
Fuzzy-based adaptive routing algorithm for networks-on-chip
M Ebrahimi, H Tenhunen, M Dehyadegari
Journal of Systems Architecture 59 (7), 516-527, 2013
242013
A New Protocol Stack Model for Network on Chip
M Dehyadgari, M Nickray, A Afzali-kusha, Z Navabi
IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and …, 2006
212006
Adaptive routing using context-aware agents for networks on chips
M Nickray, M Dehyadgari, A Afzali-kusha
2009 4th International Design and Test Workshop (IDT), 1-6, 2009
202009
A tightly-coupled multi-core cluster with shared-memory HW accelerators
M Dehyadegari, A Marongiu, MR Kakoee, L Benini, S Mohammadi, ...
2012 international conference on embedded computer systems (SAMOS), 96-103, 2012
192012
Toward embedded emotionally intelligent system
MR Jamali, M Valadbeigi, M Dehyadegari, Z Navabi, C Lucas
Proc. IEEE EWDTS, 51-56, 2007
132007
Architecture support for tightly-coupled multi-core clusters with shared-memory HW accelerators
M Dehyadegari, A Marongiu, MR Kakoee, S Mohammadi, N Yazdani, ...
IEEE Transactions on Computers 64 (8), 2132-2144, 2014
112014
Designing energy-efficient imprecise adders with multi-bit approximation
S Tajasob, M Rezaalipour, M Dehyadegari
Microelectronics Journal 89, 41-55, 2019
52019
DrAx: An automatic approach to designing more precise and energy-efficient approximate adders
M Rezaalipour, S Tajasob, M Dehyadegari, MN Bojnordi
2018 Real-Time and Embedded Systems and Technologies (RTEST), 8-15, 2018
42018
Dual-purpose custom instruction identification algorithm based on particle swarm optimization
M Kamal, NK Amiri, A Kamran, SA Hoseini, M Dehyadegari, H Noori
ASAP 2010-21st IEEE International Conference on Application-specific Systems …, 2010
42010
A Novel Ultra Low Power Accuracy Configurable Adder at Transistor Level
AM Hassani, M Rezaalipour, M Dehyadegari
2018 8th International Conference on Computer and Knowledge Engineering …, 2018
22018
Designing efficient imprecise adders using multi-bit approximate building blocks
S Tajasob, M Rezaalipour, M Dehyadegari, MN Bojnordi
Proceedings of the International Symposium on Low Power Electronics and …, 2018
22018
Multiplier for correlative input patterns
M Nickray, M Dehyadgari, A Sobhani, A Afzali-kusha
2005 International Conference on Microelectronics, 72-74, 2005
22005
AxMAP: Making Approximate Adders Aware of Input Patterns
M Rezaalipour, M Rezaalipour, M Dehyadegari, MN Bojnordi
IEEE Transaction on Computers, 1-1, 2020
12020
Enhanced graph processing in PIM accelerators with improved queue management
MA Mosayebi, AM Hasani, M Dehyadegari
Microelectronics Journal 94, 104637, 2019
12019
Accelerating stereo vision algorithm using SSE3, AVX2, and CUDA
M Kokhazadeh, Z Kokhazad, M Dehyadegari, M Daneshtalab
2017 Iranian Conference on Electrical Engineering (ICEE), 2194-2199, 2017
12017
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Artículos 1–20