Mohammad Mirza-Aghatabar
Mohammad Mirza-Aghatabar
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An empirical investigation of mesh and torus NoC topologies under different routing algorithms and traffic models
M Mirza-Aghatabar, S Koohi, S Hessabi, M Pedram
10th Euromicro conference on digital system design architectures, methods …, 2007
1012007
Introduction of novel rule based algorithms for scheduling in grid computing systems
AR Oskooei, M Mirza-Aghatabar, S Khorsandi
2008 Second Asia International Conference on Modelling & Simulation (AMS …, 2008
312008
High-level modeling approach for analyzing the effects of traffic models on power and throughput in mesh-based NoCs
S Koohi, M Mirza-Aghatabar, S Hessabi, M Pedram
21st international conference on VLSI design (VLSID 2008), 415-420, 2008
232008
Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules
M Mirza-Aghatabar, MA Breuer, SK Gupta
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
142010
Theory of redundancy for logic circuits to maximize yield/area
M Mirza-Aghatabar, MA Breuer, SK Gupta, S Nazarian
Thirteenth International Symposium on Quality Electronic Design (ISQED), 663-671, 2012
112012
SIRUP: switch insertion in redundant pipeline structures for yield and yield/area improvement
M Mirza-Aghatabar, MA Breuer, SK Gupta
2009 Asian Test Symposium, 193-199, 2009
112009
An adaptive software-based deadlock recovery technique
M Mirza-Aghatabar, A Tavakkol, H Sarbazi-Azad, A Nayebi
22nd International Conference on Advanced Information Networking and …, 2008
112008
HYPER: a Heuristic for Yield/area imProvEment using Redundancy in SoC
M Mirza-Aghatabar, MA Breuer, SK Gupta
2010 19th IEEE Asian Test Symposium, 249-254, 2010
92010
Evaluation of traffic pattern effect on power consumption in mesh and torus-based Network-on-Chips
S Koohi, M Mirza-Aghatabar, S Hessabi
International Symposium on Integrated Circuits, Singapore 200 (7), 2007
82007
A design flow to maximize yield/area of physical devices via redundancy
M Mirza-Aghatabar, MA Breuer, SK Gupta
2012 IEEE International Test Conference, 1-10, 2012
52012
An adaptive approach to manage the number of virtual channels
M Mirza-Aghatabar, S Koohi, S Hessabi, D Rahmati
22nd International Conference on Advanced Information Networking and …, 2008
52008
Evaluation of traffic pattern effect on power consumption in mesh and torus network-on-chips
S Koohi, M Mirza-Aghatabar, S Hessabi
2007 International Symposium on Integrated Circuits, 512-515, 2007
42007
An asynchronous, low power and secure framework for network-on-chips
M Mirza-Aghatabar, A Sadeghi
International Journal of Computer Science and Network Security 8 (7), 214-223, 2008
32008
Introduction of novel dispatching rules for grid scheduling algorithms
A Rasooli, M Mirza-Aghatabar, S Khorsandi
2008 International Conference on Computer and Communication Engineering …, 2008
32008
Design and synthesis of AKAM: A RISC asynchronous microprocessor
M Mirza-Aghatabar, A Rasooli, B Jafarpour
2007 International Conference on Intelligent and Advanced Systems, 1318-1323, 2007
12007
Analysis and Fast Estimation of Energy consumption in template based QDI Asynchronous Circuits
B Ghavami, M Mirza-Aghatabar, H Pedram, S Hessabi
2007 International Symposium on Integrated Circuits, 445-448, 2007
12007
Energy analysis of re-injection based deadlock recovery routing algorithms
H Kooti, M Mirza-Aghatabar, S Hessabi, A Tavakkol
2008 International Symposium on System-on-Chip, 1-4, 2008
2008
Reimbursing the handshake overhead of asynchronous circuits using compiler pre-synthesis optimizations
S ZamanZadeh, M Mirza-Aghatabar, M Najibi, H Pedram, A Sadeghi
2008 11th EUROMICRO Conference on Digital System Design Architectures …, 2008
2008
A new Approach to support Fault Simulation of Delay Insensitive Asynchronous Circuits with Synchronous Toolset
M Mirzaaghatabar, A Rasooli, B Ghavami, S Hessabi
Maximizing the Time to Profitability Using Redundancy
M Mirza-Aghatabar
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Artículos 1–20