A 26 PJA Harpe, C Zhou, Y Bi, NP Van der Meijs, X Wang, K Philips, ...
IEEE Journal of Solid-State Circuits 46 (7), 1585-1595, 2011
287 2011 VLSI circuit reconstruction from mask topology NP Van Der Meijs, JT Fokkema
Integration 2 (2), 85-119, 1984
207 1984 Extraction of circuit models for substrate cross-talk T Smedes, NP Van Der Meijs, AJ van Genderen
Proceedings of IEEE International Conference on Computer Aided Design (ICCAD …, 1995
117 1995 Fast computation of substrate resistances in large circuits AJ van Genderen, NP Van der Meijs, T Smedes
Proceedings ED&TC European Design and Test Conference, 560-565, 1996
80 1996 Combined BEM/FEM substrate resistance modeling E Schrik, NP Meijs
Proceedings of the 39th annual Design Automation Conference, 771-776, 2002
58 2002 An efficient finite element method for submicron IC capacitance extraction NP Van der Meijs, AJ van Genderen
26th ACM/IEEE Design Automation Conference, 678-681, 1989
48 1989 Extracting simple but accurate RC models for VLSI interconnect AJ Van Genderen, NP Van Der Meijs
Proc. ISCAS 88, 2351-2354, 1988
46 1988 Boundary element methods for 3D capacitance and substrate resistance calculations in inhomogeneous media in a VLSI layout verification package T Smedes, NP Van der Meijs, AJ Van Genderen
Advances in Engineering Software 20 (1), 19-27, 1994
43 1994 Simultaneous analytic area and power optimization for repeater insertion GS Garcea, NP van der Meijs, RHJM Otten
ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003
38 2003 Space-efficient extraction algorithms NP Van der Meijs, AJ Van Genderen
Proc. IEEE 3rd European Design Automation Conference, 520-524, 1992
31 1992 A Radix 22 based parallel pipeline FFT processor for MB-OFDM UWB system N Li, NP Van Der Meijs
2009 IEEE International SOC Conference (SOCC), 383-386, 2009
30 2009 Extracting circuit models for large RC interconnections that are accurate up to a predefined signal frequency PJH Elias, NP Van der Meijs
Proceedings of the 33rd annual Design Automation Conference, 764-769, 1996
29 1996 Stochastic analysis of deep-submicrometer CMOS process for reliable circuits designs A Zjajo, Q Tang, M Berkelaar, JP De Gyvez, A Di Bucchianico, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (1), 164-175, 2010
28 2010 Models for integrated components coupled with their EM environment S Wiak, A Krawczyk, I Doležel, D Ioan, W Schilders, G Ciuprina, ...
COMPEL-The international journal for computation and mathematics in …, 2008
26 2008 Reduced RC models for IC interconnections with coupling capacitances AJ van Genderen, NP Van Der Meijs
Proc. IEEE 3rd European Design Automation Conference, 132-136, 1992
25 1992 RDE-based transistor-level gate simulation for statistical static timing analysis Q Tang, A Zjajo, M Berkelaar, N van der Meijs
Proceedings of the 47th Design Automation Conference, 787-792, 2010
23 2010 Including higher-order moments of RC interconnections in layout-to-circuit extraction PJH Elias, NP Van Der Meijs
Proceedings ED&TC European Design and Test Conference, 362-366, 1996
22 1996 A 3.72 μW ultra-low power digital baseband for wake-up radios Y Zhang, S Chen, NF Kiyani, G Dolmans, J Huisken, B Busze, P Harpe, ...
Proceedings of 2011 International Symposium on VLSI Design, Automation and …, 2011
21 2011 Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits NP Van der Meijs, T Smedes
Proceedings of International Conference on Computer Aided Design, 244-251, 1996
21 1996 Sensitivity computation of interconnect capacitances with respect to geometric parameters Y Bi, K van der Kolk, D Ioan, NP van der Meijs
2008 IEEE-EPEP Electrical Performance of Electronic Packaging, 209-212, 2008
20 2008 
Michel BerkelaarDelft University of TechnologyDirección de correo verificada de berkelaar.org
