| Mechanisms for bounding vulnerabilities of processor structures NK Soundararajan, A Parashar, A Sivasubramaniam Proceedings of the 34th annual international symposium on Computer …, 2007 | 78 | 2007 |
| Quantized AVF: A means of capturing vulnerability variations over small windows of time A Biswas, N Soundararajan, SS Mukherjee, S Gurumurthi IEEE Workshop on Silicon Errors in Logic-System Effects, 2009 | 48 | 2009 |
| GemDroid: A framework to evaluate mobile platforms N Chidambaram Nachiappan, P Yedlapalli, N Soundararajan, ... ACM SIGMETRICS Performance Evaluation Review 42 (1), 355-366, 2014 | 41 | 2014 |
| Polymorphic stacked dram memory architecture J Chung, N Soundararajan US Patent App. 13/036,839, 2012 | 39 | 2012 |
| Domain knowledge based energy management in handhelds NC Nachiappan, P Yedlapalli, N Soundararajan, A Sivasubramaniam, ... 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 36 | 2015 |
| Vip: virtualizing ip chains on handheld platforms NC Nachiappan, H Zhang, J Ryoo, N Soundararajan, ... Proceedings of the 42Nd Annual International Symposium on Computer …, 2015 | 29 | 2015 |
| Optimizing power and performance for reliable on-chip networks A Yanamandra, S Eachempati, N Soundararajan, V Narayanan, MJ Irwin, ... 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 431-436, 2010 | 20 | 2010 |
| Short-circuiting memory traffic in handheld platforms P Yedlapalli, NC Nachiappan, N Soundararajan, A Sivasubramaniam, ... 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 166-177, 2014 | 19 | 2014 |
| Dynamic power budgeting for mobile systems running graphics workloads U Gupta, R Ayoub, M Kishinevsky, D Kadjo, N Soundararajan, U Tursun, ... IEEE Transactions on Multi-Scale Computing Systems 4 (1), 30-40, 2017 | 18 | 2017 |
| Detecting architectural vulnerability of processor resources A Biswas, N Soundararajan, S Mukherjee US Patent 7,849,387, 2010 | 15 | 2010 |
| Impact of dynamic voltage and frequency scaling on the architectural vulnerability of GALS architectures N Soundararajan, N Vijaykrishnan, A Sivasubramaniam Proceedings of the 2008 international symposium on Low Power Electronics …, 2008 | 15 | 2008 |
| Efficient tag storage for large data caches J Chung, N Soundararajan US Patent App. 13/104,865, 2012 | 13 | 2012 |
| Characterizing the soft error vulnerability of multicores running multithreaded applications N Soundararajan, A Sivasubramaniam, V Narayanan ACM SIGMETRICS Performance Evaluation Review 38 (1), 379-380, 2010 | 13 | 2010 |
| Towards resilient micro-architectures: Datapath reliability enhancement using STT-MRAM K Swaminathan, R Mukundrajan, N Soundararajan, V Narayanan 2011 IEEE Computer Society Annual Symposium on VLSI, 236-241, 2011 | 9 | 2011 |
| Memory in processor-supercomputer on a chip: processor design and execution semantics for massive single-chip performance N Venkateswaran, A Shriraman, N Soundararajan 19th IEEE International Parallel and Distributed Processing Symposium, 8 pp., 2005 | 9 | 2005 |
| Memory in processor: Evolution of a novel supercomputer architecture N Venkateswaran, A Shriraman, A Krishnan, N Soundararajan, S Srinivas MEDEA Workshop PACT, IEEE and ACM SIGARCH 10 (1152923.1024298), 2003 | 7 | 2003 |
| User-aware frame rate management in android smartphones B Egilmez, M Schuchhardt, G Memik, R Ayoub, N Soundararajan, ... ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-17, 2017 | 6 | 2017 |
| Analysis and solutions to issue queue process variation N Soundararajan, A Yanamandra, C Nicopoulos, N Vijaykrishnan, ... 2008 IEEE International Conference on Dependable Systems and Networks With …, 2008 | 5 | 2008 |
| Hardware Compilation concept for the MIP SCOC and Hierarchically-based Multiple Host System for the MIP cluster NK Soundararajan A Thesis Submitted to Waran Research Foundation 2002, 2002 | 5 | 2002 |
| Technologies for dynamic acceleration of general-purpose code using binary translation targeted to hardware accelerators with runtime execution offload J Bobba, NK Soundararajan US Patent 10,740,152, 2020 | 2 | 2020 |
Anand SivasubramaniamDistinguished Professor of Computer Science & Engineering, Penn State UniversityDirección de correo verificada de cse.psu.edu
