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Saurabh Adya
Saurabh Adya
Apple
Verified email at umich.edu
Title
Cited by
Cited by
Year
Fixed-outline floorplanning: Enabling hierarchical design
SN Adya, IL Markov
IEEE transactions on very large scale integration (VLSI) systems 11 (6 …, 2003
4952003
Capo: robust and scalable open-source min-cut floorplacer
JA Roy, DA Papa, SN Adya, HH Chan, AN Ng, JF Lu, IL Markov
Proceedings of the 2005 international symposium on Physical design, 224-226, 2005
1962005
Min-cut floorplacement
JA Roy, SN Adya, DA Papa, IL Markov
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
1712006
Unification of partitioning, placement and floorplanning
SN Adya, S Chaturvedi, JA Roy, DA Papa, IL Markov
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
1622004
Fixed-outline floorplanning through better local search
SN Adya, IL Markov
Proceedings 2001 IEEE International Conference on Computer Design: VLSI in …, 2001
1582001
Consistent placement of macro-blocks using floorplanning and standard-cell placement
SN Adya, IL Markov
Proceedings of the 2002 international symposium on Physical design, 12-17, 2002
1532002
Benchmarking for large-scale placement and beyond
SN Adya, MC Yildiz, IL Markov, PG Villarrubia, PN Parakh, PH Madden
Proceedings of the 2003 international symposium on Physical design, 95-103, 2003
1012003
On whitespace and stability in mixed-size placement and physical synthesis
SN Adya, IL Markov, PG Villarrubia
ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003
812003
Combinatorial techniques for mixed-size placement
SN Adya, IL Markov
ACM Transactions on Design Automation of Electronic Systems (TODAES) 10 (1 …, 2005
712005
Unification of partitioning, floorplanning and placement
SN Adya, S Chaturvedi, JA Roy, D Papa, IL Markov
Proc. ICCAD, 550-557, 2004
632004
Are floorplan representations important in digital design?
HH Chan, SN Adya, IL Markov
Proceedings of the 2005 international symposium on physical design, 129-136, 2005
602005
Dkm: Differentiable k-means clustering layer for neural network compression
M Cho, KA Vahid, S Adya, M Rastegari
arXiv preprint arXiv:2108.12659, 2021
402021
On whitespace in mixed-size placement and physical synthesis
SN Adya, IL Markov, PG Villarrubia
Proc. Int. Conf. on Computer Aided Design, 311-318, 2003
232003
Hybrid transformer/ctc networks for hardware efficient voice triggering
S Adya, V Garg, S Sigtia, P Simha, C Dhir
arXiv preprint arXiv:2008.02323, 2020
222020
On whitespace and stability in physical synthesis
SN Adya, IL Markov, PG Villarrubia
Integration 39 (4), 340-362, 2006
202006
An effective timing-driven detailed placement algorithm for FPGAs
S Dhar, MA Iyer, S Adya, L Singhal, N Rubanov, DZ Pan
Proceedings of the 2017 ACM on International Symposium on Physical Design …, 2017
192017
Methods and apparatuses for circuit design and optimization
S Adya, KS McElvain, G Paul
US Patent 8,307,315, 2012
182012
Democratizing production-scale distributed deep learning
M Ma, H Pouransari, D Chao, S Adya, SA Serrano, Y Qin, D Gimnicher, ...
arXiv preprint arXiv:1811.00143, 2018
162018
Constructive benchmarking for placement
DA Papa, SN Adya, IL Markov
Proceedings of the 14th ACM Great Lakes symposium on VLSI, 113-118, 2004
162004
Improving min-cut placement for VLSI using analytical techniques
SN Adya, IL Markov, PG Villarrubia
Proc. IBM ACAS Conference, 55-62, 2003
162003
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