Alireza Shafaei
Alireza Shafaei
Software Engineer at Google
Dirección de correo verificada de usc.edu - Página principal
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Año
Optimization of quantum circuits for interaction distance in linear nearest neighbor architectures
A Shafaei, M Saeedi, M Pedram
2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2013
802013
Qubit placement to minimize communication overhead in 2D quantum architectures
A Shafaei, M Saeedi, M Pedram
2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 495-500, 2014
752014
An integrated row-based cell placement and interconnect synthesis tool for large SFQ logic circuits
SN Shahsavani, TR Lin, A Shafaei, CJ Fourie, M Pedram
IEEE Transactions on Applied Superconductivity 27 (4), 1-8, 2017
402017
Fincacti: Architectural analysis and modeling of caches with deeply-scaled finfet devices
A Shafaei, Y Wang, X Lin, M Pedram
2014 IEEE Computer Society Annual Symposium on VLSI, 290-295, 2014
342014
5nm FinFET standard cell library optimization and circuit synthesis in near-and super-threshold voltage regimes
Q Xie, X Lin, Y Wang, MJ Dousti, A Shafaei, M Ghasemi-Gol, M Pedram
2014 IEEE Computer Society Annual Symposium on VLSI, 424-429, 2014
302014
Pilot Register File: Energy efficient partitioned register file for GPUs
M Abdel-Majeed, A Shafaei, H Jeon, M Pedram, M Annavaram
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
282017
Layout optimization for quantum circuits with linear nearest neighbor architectures
M Pedram, A Shafaei
IEEE Circuits and Systems Magazine 16 (2), 62-74, 2016
262016
Design of a universal logic block for fault-tolerant realization of any logic operation in trapped-ion quantum circuits
H Goudarzi, MJ Dousti, A Shafaei, M Pedram
Quantum information processing 13 (5), 1267-1299, 2014
192014
Design of multiple fanout clock distribution network for rapid single flux quantum technology
N Katam, A Shafaei, M Pedram
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 384-389, 2017
172017
Design of complex rapid single-flux-quantum cells with application to logic synthesis
N Katam, A Shafaei, M Pedram
2017 16th International Superconductive Electronics Conference (ISEC), 1-3, 2017
162017
SFQmap: A technology mapping tool for single flux quantum logic circuits
G Pasandi, A Shafaei, M Pedram
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
152018
A placement algorithm for superconducting logic circuits based on cell grouping and super-cell placement
SN Shahsavani, A Shafaei, M Pedram
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
132018
Low write-energy STT-MRAMs using FinFET-based access transistors
A Shafaei, Y Wang, M Pedram
2014 IEEE 32nd International Conference on Computer Design (ICCD), 374-379, 2014
122014
Reversible logic synthesis of k-input, m-output lookup tables
A Shafaei, M Saeedi, M Pedram
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013
112013
Sport lab sfq logic circuit benchmark suite
N Katam, SN Shahsavani, TR Lin, G Pasandi, A Shafaei, M Pedram
Univ. South. California, Los Angeles, CA, USA, Tech. Rep, 2017
102017
Squash: a scalable quantum mapper considering ancilla sharing
MJ Dousti, A Shafaei, M Pedram
Proceedings of the 24th edition of the great lakes symposium on VLSI, 117-122, 2014
102014
An optical wavelength switching architecture for a high-performance low-power photonic noc
S Koohi, A Shafaei, S Hessabi
2011 IEEE Workshops of International Conference on Advanced Information …, 2011
102011
An efficient timing analysis model for 6T FinFET SRAM using current-based method
T Cui, J Li, A Shafaei, S Nazarian, M Pedram
2016 17th International Symposium on Quality Electronic Design (ISQED), 263-268, 2016
92016
A cross-layer framework for designing and optimizing deeply-scaled FinFET-based SRAM cells under process variations
A Shafaei, S Chen, Y Wang, M Pedram
The 20th Asia and South Pacific Design Automation Conference, 75-80, 2015
82015
Analyzing the dark silicon phenomenon in a many-core chip multi-processor under deeply-scaled process technologies
A Shafaei Bejestan, Y Wang, S Ramadurgam, Y Xue, P Bogdan, ...
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 127-132, 2015
72015
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