Joel Emer

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Vivienne SzeProfessor, EECS at MITDirección de correo verificada de mit.edu
Steve KecklerVice President of Architecture Research, NVIDIADirección de correo verificada de cs.utexas.edu
Angshuman ParasharSr. Research Scientist, NVIDIADirección de correo verificada de nvidia.com
Aamer JaleelArchitecture Research Group (ARG), Nvidia ResearchDirección de correo verificada de nvidia.com
Yu-Hsin ChenLead AI Architect at EnCharge AIDirección de correo verificada de enchargeai.com
Tien-Ju YangMassachusetts Institute of TechnologyDirección de correo verificada de mit.edu
Michael C. AdlerIntelDirección de correo verificada de intel.com
Steven K. ReinhardtMicrosoftDirección de correo verificada de microsoft.com
William DallyChief Scientist, NVIDIA; Adjunct Professor of CS and EE, Stanford University;Dirección de correo verificada de stanford.edu
Brucek KhailanySenior Director of VLSI Research, NVIDIADirección de correo verificada de cva.stanford.edu
Yakun Sophia ShaoAssociate Professor, UC BerkeleyDirección de correo verificada de berkeley.edu
Susan J EggersProfessor of Computer Science, University of WashingtonDirección de correo verificada de cs.washington.edu
Henry M. LevyProfessor and Wissner-Slivka Chair, Paul G. Allen School of Computer Science & EngineeringDirección de correo verificada de cs.washington.edu
William HasenplaughD. E. Shaw ResearchDirección de correo verificada de mit.edu
Daniel SanchezMassachusetts Institute of TechnologyDirección de correo verificada de csail.mit.edu
Priyanka RainaAssistant Professor, Stanford UniversityDirección de correo verificada de stanford.edu
Neal CragoSenior Research Scientist, NVIDIADirección de correo verificada de nvidia.com
Kermin Elliott FlemingIntel CorporationDirección de correo verificada de intel.com
Jason ClemonsNVIDIA - Senior Research ScientistDirección de correo verificada de nvidia.com
Nathaniel PinckneyNVIDIADirección de correo verificada de umich.edu

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Joel Emer

Professor of the Practice, MIT - Sr. Distinguished Research Scientist, Nvidia

Dirección de correo verificada de csail.mit.edu - Página principal

Computer Architecture


Título Ordenar por citas Ordenar por año Ordenar por título	Citado por Citado por	Año
Efficient processing of deep neural networks: A tutorial and survey V Sze, YH Chen, TJ Yang, JS Emer Proceedings of the IEEE 105 (12), 2295-2329, 2017	4253	2017
Eyeriss: An energy-efficient reconfigurable accelerator for deep convolutional neural networks YH Chen, T Krishna, JS Emer, V Sze IEEE journal of solid-state circuits 52 (1), 127-138, 2016	3846	2016
Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks YH Chen, J Emer, V Sze ACM SIGARCH computer architecture news 44 (3), 367-379, 2016	1919	2016
SCNN: An accelerator for compressed-sparse convolutional neural networks A Parashar, M Rhu, A Mukkara, A Puglielli, R Venkatesan, B Khailany, ... ACM SIGARCH computer architecture news 45 (2), 27-40, 2017	1433	2017
A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor SS Mukherjee, C Weaver, J Emer, SK Reinhardt, T Austin Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003	1313	2003
Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor DM Tullsen, SJ Eggers, JS Emer, HM Levy, JL Lo, RL Stamm Proceedings of the 23rd annual international symposium on Computer …, 1996	1230	1996
Eyeriss v2: A flexible accelerator for emerging deep neural networks on mobile devices YH Chen, TJ Yang, J Emer, V Sze IEEE Journal on Emerging and Selected Topics in Circuits and Systems 9 (2 …, 2019	1030	2019
High performance cache replacement using re-reference interval prediction (RRIP) A Jaleel, KB Theobald, SC Steely Jr, J Emer ACM SIGARCH computer architecture news 38 (3), 60-71, 2010	999	2010
Adaptive insertion policies for high performance caching MK Qureshi, A Jaleel, YN Patt, SC Steely, J Emer ACM SIGARCH Computer Architecture News 35 (2), 381-391, 2007	985	2007
Simultaneous multithreading: A platform for next-generation processors SJ Eggers, JS Emer, HM Levy, JL Lo, RL Stamm, DM Tullsen IEEE micro 17 (5), 12-19, 1997	717	1997
The soft error problem: An architectural perspective SS Mukherjee, J Emer, SK Reinhardt 11th International Symposium on High-Performance Computer Architecture, 243-247, 2005	605	2005
Understanding error propagation in deep learning neural network (DNN) accelerators and applications G Li, SKS Hari, M Sullivan, T Tsai, K Pattabiraman, J Emer, SW Keckler Proceedings of the International Conference for High Performance Computing …, 2017	593	2017
Memory dependence prediction using store sets GZ Chrysos, JS Emer ACM SIGARCH Computer Architecture News 26 (3), 142-153, 1998	484	1998
Hardware for machine learning: Challenges and opportunities V Sze, YH Chen, J Emer, A Suleiman, Z Zhang 2017 IEEE custom integrated circuits conference (CICC), 1-8, 2017	459	2017
Scheduling heterogeneous multi-cores through performance impact estimation (PIE) K Van Craeynest, A Jaleel, L Eeckhout, P Narvaez, J Emer ACM SIGARCH Computer Architecture News 40 (3), 213-224, 2012	450	2012
There’s plenty of room at the Top: What will drive computer performance after Moore’s law? CE Leiserson, NC Thompson, JS Emer, BC Kuszmaul, BW Lampson, ... Science 368 (6495), eaam9744, 2020	441	2020
Timeloop: A systematic approach to dnn accelerator evaluation A Parashar, P Raina, YS Shao, YH Chen, VA Ying, A Mukkara, ... 2019 IEEE international symposium on performance analysis of systems and …, 2019	433	2019
Adaptive insertion policies for managing shared caches A Jaleel, W Hasenplaugh, M Qureshi, J Sebot, S Steely Jr, J Emer Proceedings of the 17th international conference on Parallel architectures …, 2008	421	2008
Simba: Scaling deep-learning inference with multi-chip-module-based architecture YS Shao, J Clemons, R Venkatesan, B Zimmer, M Fojtik, N Jiang, B Keller, ... Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019	416	2019
Techniques to reduce the soft error rate of a high-performance microprocessor C Weaver, J Emer, SS Mukherjee, SK Reinhardt ACM SIGARCH Computer Architecture News 32 (2), 264, 2004	393	2004

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