| Power-efficient accelerator design for neural networks using computation reuse A Yasoubi, R Hojabr, M Modarressi IEEE computer architecture letters 16 (1), 72-75, 2016 | 42 | 2016 |
| Customizing Clos Network-on-Chip for Neural Networks R Hojabr, M Modarressi, M Daneshtalab, A Yasoubi, A Khonsari IEEE Transactions on Computers, 2017 | 33 | 2017 |
| CuPAN–high throughput on-chip interconnection for neural networks A Yasoubi, R Hojabr, H Takshi, M Modarressi, M Daneshtalab Neural Information Processing: 22nd International Conference, ICONIP 2015 …, 2015 | 9 | 2015 |
| Low-power online ECG analysis using neural networks M Modarressi, A Yasoubi, M Modarressi 2016 Euromicro Conference on Digital System Design (DSD), 547-552, 2016 | 5 | 2016 |
| Computation reuse-aware accelerator for neural networks H Mahdiani, A Khadem, A Yasoubi, A Ghanbari, M Modarressi, ... Institution of Engineering and Technology, 2020 | 1 | 2020 |
Mehdi ModarressiAssistant Prof. of Computer Engineering, School of ECE, University of TehranDirección de correo verificada de ut.ac.ir
