| A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator With an FoM of -250 dB AT Narayanan, M Katsuragi, K Kimura, S Kondo, KK Tokgoz, K Nakata, ... IEEE Journal of Solid-State Circuits 51 (7), 1630-1640, 2016 | 131 | 2016 |
| A pulse-driven LC-VCO with a figure-of-merit of− 192dBc/Hz AT Narayanan, K Kimura, W Deng, K Okada, A Matsuzawa ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 343-346, 2014 | 14 | 2014 |
| An AM-PM noise mitigation technique in class-C VCO K Kimura, AT Narayanan, K Okada, A Matsuzawa IEICE Transactions on Electronics 98 (12), 1161-1170, 2015 | 5 | 2015 |
| A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator aided DTC T Aravind, M Katsuragi, K Kimura, K Okada, A Matsuzawa A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator aided DTC, 2015 | | 2015 |
| C-12-15 A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator aided DTC AT Narayanan, K Makihiko, K Kento, O Kenichi, M Akira 電子情報通信学会ソサイエティ大会講演論文集 2015 (2), 55, 2015 | | 2015 |
| A Pulse-Driven VCO with Enhanced Efficiency T Aravind, K Kimura, W Deng, K Okada, A Matsuzawa A Pulse-Driven VCO with Enhanced Efficiency, 2014 | | 2014 |
